N4903A Agilent Communication Analyzer

Additional Features:

• 150 Mb/s to 7 Gb/s or to 12.5 Gb/s pattern generator and error detector
• >0.5 UI calibrated and integrated jitter injection
• Excellent signal performance and sensitivity
• Built-in clock data recovery with tunable and compliant loop bandwidth
• Excellent precision and sensitivity for accurate measurements
• Choice of feature set and frequency classes to tailor to test needs and budget
• Pass/Fail testing
• State-of-the-art user interface with color touch screen
• Remote control via LAN, USB and GPIB interfaces, compatible with existing command set Agilent 71612, 81630A Series, N4900 Series
• Small form factor saves rack or bench space
• Automated and compliant jitter tolerance tests covers popular serial bus standards: PCI Express, SATA, Fibre Channel, SATA, FB-DIMM, CEI 6G/11G, 10 GbE/XAUI, XFP/XFI, SFP+
• Delay control input for generator to apply any external jitter source
• Bit recovery mode to test unknown data traffic
• Pattern sequencer to generate complex training sequences
• SSC clocking for computer buses
• Subrate clocks to generate reference clocks easily
• Differential I/O for DATA and CLOCK and most supplementary signals for testing serial interfaces
• Integrated CDR (clock data recovery) to test clockless devices from 1 to 12.5 Gb/s
• Compliant and tunable loop bandwidth (opt. CTR)
• Highest performance BERT for accurate measurements
• Remote operation of GUI via web server

The J-BERT N4903A addresses the needs of R&D and validation teams to characterize serial I/O ports or ASICs up to 12.5 Gb/s. Integrated and calibrated jitter sources for jitter tolerance measurements also allow designers to characterize and prove compliance of their receiver’s jitter tolerance. The J-BERT N4903A High-Performance Serial BERT is the ideal choice for characterization. It offers fully integrated and calibrated jitter tolerance tests integrated in a high-performance BERT.

The J-BERT N4903A High-Performance Serial BERT provides the only complete jitter tolerance test. It is the ideal choice for R&D and validation teams characterizing and stressing chips and transceiver modules that have serial I/O ports up to 7 Gb/s or 12.5 Gb/s. It can characterize a receiver’s jitter tolerance and prove its compliance to today’s most popular standards, such as PCI Express, SATA, Fibre Channel, Fully Buffered DIMM, CEI, 10 GbE/ XAUI, XFP/XFI, SFP+.