TLA7N2 Tektronix Logic Analyzer


The TLA7N2 is a 68 channel Logic Analyzer from Tektronix. A logic analyzer is a type of electronic test equipment that engineers use to capture and display signals from a digital circuit or system. Logic analyzers are useful for measuring data, such as state machine traces, timing diagrams, and protocol decodes. When an engineer needs to view the timing relationship between multiple signals, he or she will use a logic analyzer for signal monitoring over time.

Additional Features:

  • 64 data and 4 clock channels
  • 64 K or 256 K or 1 M or 4 M samples Memory Depth
  • 100 MHz State
  • 2 GHz Timing
  • Data Rate (Typical): 400 MHz (200 MHz option required) half channel. (Requires channels to be multiplexed.)
  • These multiplexed channels double the memory depth
  • Module Merging: Up to five 102 channel or 136 channel modules can be "merged" to make up to a 680 channel module. Merged modules exhibit the same depth and state speed as the lesser of the five individual modules. Word/setup-and-hold/glitch/transition recognizers span all five modules. Range recognizers limited to three module merge. Only one set of clock connections is required.
  • Time Stamp: 51 bits at 125 ps resolution (3.25 days duration)
  • Clocking/Acquisition Modes: Internal, internal 2X, internal 4X, external, external 450 (with option 45 only). 8 GHz MagniVu high-speed timing is available simultaneous with all modes.
  • Number of Mainframe Slots Required per TLA Series Module: 2

Input Characteristics (with P68xx or P69xx probes)

  • Capacitive Loading: 0.5 pF (P69xx), <0.7 pF (P68xx) clock/data
  • Input Voltage Range Operating: -2.5 V to 5.0 V. Nondestructive: ± 15 V
  • Threshold Selection Range: From -2.0 V to +4.5 V in 5 mV increments
  • Threshold presets include TTL (1.5 V), CMOS (1.65 V), ECL (-1.3 V), PECL (3.7 V), LVPECL (2.0 V), LVCMOS 1.5 V (0.75 V), LVCMOS 1.8 V (0.9 V), LVCMOS 2.5 V (1.25 V), LVCMOS 3.3 V (1.65 V), LVDS (0 V), and user defined
  • Threshold Selection Channel Granularity Separate selection for each of the clock/qualifier channels and one per group of 16 data channels for each 34 channel probe
  • Threshold Accuracy (including probe): ±(35 mV + 1%)
  • Minimum Input Signal Swing: 300 mV (single ended). VMAX - VMIN > 150 mV (differential)
  • Input Signal Minimum Slew Rate: 200 mV/ns typical

The Tektronix TLA7N2 is a 68-Channel Logic Analyzer Module for the TLA700 Series Logic Analyzers.

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